Also note that there will need to be an exact match between the numbered pins in the schematic part and the numbered pins on the PCB Footprint. These values assume that the default PCB Footprints from the product installation are being used, IF your installation is not configured to use the default PCB Footprints from the product installation, you will need to specify PCB Footprint property values for the names of the footprints that match the footprints in your libraries. Next the PCB Footprint property values need to set for all of the parts in the design. Double-click the part R17 and then left-click on New Property and add a new property Name of PSpiceOnly with a Value of TRUE. This part has only been added to aid in the PSpice simulation and is not required for the actual design, the load will be the "headphones". Next we need to ensure that the load resistor R17 is ignored by the netlist. You may need to use right-click>Mirror Geometry or the right-click>Rotate command to get the orientation to match the original schematic. We need to add the connectors as shown in the initial preview of the design and we also need to add a property to the load resistor so that it is ignored by the netlist and hence not in the PCB Layout.Īdd the connectors J1-J3 by using the Place>Part command, add the Connector library from C:\Cadence\SPB_17.4 then tools\Capture\library and then locate the HEADER2 part and place it three times. Before we start making the design ready for PCB Layout we need to make a few changes to the schematic.
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